Author(s): Farah Ali Tahseen, Salah Abdulghani Alabady and Sukaina Shukur Alhajji

Abstract: Error detection and correction, in particular in high-data-rate and high-reliability wireless network applications, has received significant concentration. Error detection and correction are techniques that enable secure transmission of digital data through unreliable communications networks in the information and coding theory. The use of error detection and correction techniques leads to an increase in the performance of the network by reducing the end-to-end delay, reducing the bit error rate, and thus increasing the throughput. Since OSI and TCP/IP models have no bits corrections operation, and the only error detection operation is performed in the data link layer and the transport layer using Cyclic Redundancy Check (CRC). We suggest adding a sub-layer between the physical layer and the data link layer responsible for detecting and correcting errors in this paper. The hardware design of the proposed sub-layer using the Hamming code is implemented using Arduino. As a result, without having to demand retransmission from the sender, we will have a network device that can detect and correct a bit of error in the frames.

DOI: 10.33545/26633582.2021.v3.i1a.44

Pages: 31-34 | Views: 1210 | Downloads: 649

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