International Journal of Circuit, Computing and Networking

P-ISSN: 2707-5923, E-ISSN: 2707-5931
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2020, Vol. 1, Issue 1, Part A

Analyzing and detecting faulty nodes in delay tolerant network


Author(s): Budagappa Gari Rasi

Abstract: For our situation Delay Tolerant Networks (DTN) specifically, the uncommon gathering occasions necessitate that hubs are effective in spreading just right data. For that reason, instruments to quickly distinguish conceivable flawed hubs ought to be created. Disseminated broken hub location has been tended to in the writing with regards to sensor and vehicular systems, however as of now proposed arrangements experience the ill effects of long deferrals in recognizing and disconnecting hubs creating flawed information. This is unacceptable to DTNs where hubs meet just once in a while. This paper proposes a completely appropriated and effectively implementable way to deal with enable each DTN hub to quickly recognize whether its sensors are creating broken information. The dynamical conduct of the proposed calculation is approximated by some constant time state conditions, whose balance is described. The nearness of acting mischievously hubs, attempting to bother the flawed hub discovery process, is additionally considered. Recognition and false alert rates are assessed by looking at both hypothetical and reenactment results. Numerical outcomes evaluate the viability of the proposed arrangement and can be utilized to give rules for the calculation plan.

DOI: 10.33545/27075923.2020.v1.i1a.8

Pages: 32-35 | Views: 699 | Downloads: 257

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How to cite this article:
Budagappa Gari Rasi. Analyzing and detecting faulty nodes in delay tolerant network. Int J Circuit Comput Networking 2020;1(1):32-35. DOI: 10.33545/27075923.2020.v1.i1a.8
International Journal of Circuit, Computing and Networking

International Journal of Circuit, Computing and Networking

International Journal of Circuit, Computing and Networking
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